1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device.
2. Description of the Related Art
To improve the performance of semiconductor devices, proposals have been made of methods of manufacturing a semiconductor device using an SOI (Silicon On Insulator) technique or an SON (Silicon On Nothing) technique (see, for example, Jpn. Pat. Appln. KOKAI Publication Nos. 2005-45258 and 2006-100322).
FIGS. 34 and 35 show problems with a conventional technique. With this conventional technique, as shown in FIG. 34, an epitaxial SiGe layer 102 and an epitaxial silicon layer 103 are formed on a silicon substrate 101. The epitaxial SiGe layer 102 is subsequently removed to form a cavity. Moreover, as shown in FIG. 35, an insulating film 104 is formed in the cavity. Thus, a semiconductor device (partial SOI substrate) having a partial SOI structure is obtained.
However, with the above-described conventional technique, the epitaxial SiGe layer 102, having an opening 105, is formed on the silicon substrate 101. Thus, owing to the opening 105, a recess portion 106 is formed in the epitaxial silicon layer 103. Therefore, the flatness of a surface of the epitaxial silicon layer 103 may be degraded, affecting the manufacture of the semiconductor device.
Thus, it is conventionally difficult to form a very flat epitaxial semiconductor layer in the semiconductor device having the partial SOI structure.